Shallow trench isolation (STI) technology uses shallow, refilled trenches for isolating devices of the same type as replacements for LOCOS isolation. The process begins by depositing a layer of pad oxide on a silicon substrate and patterning a nitride mask to define active regions on the silicon substrate. Shallow trenches are then etched into the silicon substrate in the openings in the nitride mask between the active regions. A liner oxidation process is performed in the recesses in which a thin layer of oxide is grown. Next, an oxide (e.g., SiO2) is deposited over the silicon substrate and is then etched back so that it remains only in the trenches, its top surface level with the nitride mask. After the oxide is etched back, the nitride mask is stripped to expose the pad oxide and a dip back process is performed on the pad oxide. Thereafter, a layer of polysilicon (Poly1) may be patterned to define floating gate structures for the semiconductor device.
Although the STI process has the advantages of eliminating birds beak of the LOCOS process and of providing a planar surface, the STI process has several drawbacks. FIG. 1 is a block diagram illustrating a cross-sectional view of a portion of a semiconductor fabricated during a conventional STI process. Trenches 10 have been etched in isolation regions 18 of the substrate 12 adjacent to active regions 20 on which a layer of polysilicon 14 has been deposited. The silicon substrate 12 in the active regions 20 form the side walls 22 of the trenches 10. Conventional STI processing results in the trenches 10 having sharp corners 16, as shown. Because both the silicon substrate 12 and the polysilicon 14 are conductive, the sharp corners 16 increase the chance of electron leakage (E) between the polysilicon 14 and the silicon substrate 12 due to the presence of an electric field, which is increased with by the sharpness of the substrate corners 16.
Conventional approaches for rounding the trench corners 16 include 1) performing a single liner oxidation with a double sacrificial oxidation or 2) performing a double liner oxidation with a single sacrificial oxidation. Both the approaches, however, fail to sufficiently round the trench corners 16 to reduce electron leakage to an acceptable level.
Accordingly what is needed is a STI process that has improved trench corner rounding that significantly prevents electron leakage between the polysilicon and the active regions of the substrate. The present invention addresses such a need.